Research and implementation of debugging method of digital phase-locked loop

A Digital Implementation of a Frequency Steered Phase Locked Loop

A digital implementation of a new technique that delivers an extremely accurate and stable phase locked loop system (PLL) is presented. The new technique uses competing phase and frequency loops to incorporate an accurate local reference frequency into the phase locked loop structure. Disturbances on the phase loop caused by the digital frequency loop are identified and a method to mitigate the...

Quantization Effects Analysis on Phase Noise and Implementation of ALL Digital Phase Locked-Loop

Acknowledgement It has been a real privilege and honor to be a graduate student in joint master program of micro-electronic department at Fudan University and SoC program of Royal Institute of Technology (KTH). It is definitely an enjoyable and unforgettable experience to work with many brilliant students and teachers across country borders. I am deeply indebted to many people who have assisted...

Design and Implementation of FPGA based linear All Digital Phase-Locked Loop for Signal Processing Applications

Design and Implementation of Low Ripple Low Power Digital Phase-Locked Loop

We propose a phase-locked loop (PLL) architecture which reduces double frequency ripple without increasing the order of loop filter. Proposed architecture uses quadrature numerically–controlled oscillator (NCO) to provide two output signals with phase difference of π / 2 . One of them is subtracted from the input signal before multiplying with the other output of NCO. The system also provides s...

High Speed Delay-Locked Loop for Multiple Clock Phase Generation

In this paper, a high speed delay-locked loop (DLL) architecture ispresented which can be employed in high frequency applications. In order to design the new architecture, a new mixed structure is presented for phase detector (PD) and charge pump (CP) which canbe triggered by double edges of the input signals. In addition, the blind zone is removed due to the elimination of reset signal. Theref...